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This chapter gives an overview of the Cisco ATM SBus adapter. The Cisco ATM SBus adapter is a network interface card designed to be easily installed in an SBus slot of several types of Sun SPARCstations, servers, and SPARC-compatible systems. One of the most important functions of the Cisco ATM SBus adapter is to perform the segmentation and reassembly of data for transmission on an ATM network.
The adapter segments outgoing data into cells and transmits them to an ATM switch for forwarding to their destination. The same adapter reassembles received cells into a Protocol Data Unit (PDU) that can be processed by a protocol stack.
The workstation in which you are installing the adapter will be an endpoint in your ATM network. An ATM network is a point-to-point and point-to-multipoint, switched environment that requires the setting up of connections between the ATM endpoints. For one endpoint to communicate with another endpoint, a virtual connection must be defined between them. The creation of a virtual connection can be done manually by defining Permanent Virtual Connections (PVCs) or dynamically using Switched Virtual Connections (SVCs).
The Cisco ATM SBus adapter features a highly integrated design. It contains several high-performance features to reduce internal data flow and minimize overhead imposed on the host processor.
To maximize throughput, the Cisco ATM SBus adapter supports 32-bit wide data transfers and data bursts of up to 32 bytes. Bus mastering minimizes host processor intervention.
Additional features and benefits of the Cisco ATM SBus adapter include:
The Cisco ATM SBus adapter features a compact design that fits conveniently into a single SBus slot. Two LED indicators are used to monitor link and frame status.
The Cisco ATM SBus adapter uses the Universal Test & Operations Physical Interface for ATM (UTOPIA) interface for transferring data between the segmentation and reassembly (SAR) and the SONET framer components.
The transmit UTOPIA interface is a byte-wide interface used by the SAR for transmitting data to the SONET framer. The SAR continuously transmits cells to the framer. If the SAR has nothing to send, the SAR inserts null cells into the SONET payload.
The receive UTOPIA interface is a byte-wide interface used by the SAR for receiving data from the framer. The SAR continuously receives cells from the framer. The SAR drops the unassigned and null cells.
The receive FIFO increases performance on the receive UTOPIA path. This, in addition to the FIFO in the SAR, reduces the chance of packets being dropped because of bus latency.
The received data from the transceiver is connected to a clock recovery chip. The clock recovery chip uses a 19.44 MHz oscillator. It recovers the 155.54 MHz clock and the receive data from the receive data. The recovered clock is connected to the SONET framer. The clock recovery chip also generates a 155.54 MHz clock for the SONET framer to be used as the transmit clock.
The FCode EPROM is used to store the open boot command for the SBus adapter and parameters such as the hardware revision, serial number, physical layer type, and base MAC address.
To transmit data, a host application must place data within the host data buffers. The host builds multiple data packets within its allocated memory. A data packet consists of one or more buffers and is a maximum of 64 KB. A typical data packet contains the application payload data (information data blocks), host protocol headers, and any other protocol-related overhead. After a single data packet is built, the host issues a command to the SAR to transmit the data packet.
Once the command is received, the SAR switches from a slave to the master, gaining control of the host SBus. Consequently, the SAR begins transferring 48-byte blocks of data, using a combination of 32- and 16-byte bursts or three 16-byte bursts. The transmit adaptation layer processor within the segmentation and reassembly (SAR) chip processes all functions related to the ATM adaptation layer and adds four bytes of ATM header information to each cell. Next, this four-byte header and Header Error Correction (HEC) place holder byte are concatenated with the 48-byte payload and stored in the transmit FIFO.
These 53-byte ATM cells are transferred from the SAR to the SONET framer chip via the UTOPIA interface. The HEC byte is calculated using the four-byte header, which then replaces the HEC placeholder byte, completing the 53-byte ATM transmit cell (five for the header and 48 for data). Next, the 48-byte payload field within the ATM cell is scrambled using a self-synchronizing scrambler polynomial. Then the SONET framer chip generates and multiplexes a SONET header with multiple ATM cells and builds the STS-3c synchronous payload envelope (SPE). SPE is scrambled and converted into serial data.
When an ATM cell is received, a clock recovery circuit is used to recover the clock from the data stream. The SONET framer chip receives a SONET frame every 125 microseconds. This serial data stream is converted into byte-wide data. The SONET frame is unscrambled and checked for parity, and the SONET header/ATM cells are demultiplexed. Finally, the ATM cells are unscrambled, the HEC is checked, and the byte-wide information is passed to the output buffer (FIFO).
The ATM cells are transferred from the output buffer to the SAR at the host frequency rate. The SAR decodes the header virtual circuit identifier (VCI) and virtual path identifier (VPI) and assembles the packet in host memory.
The SAR control memory is a work space that supports the transmit and receive DMA state tables. The 128 KB of SAR memory can ideally support up to 2,000 virtual connections.
The Cisco ATM SBus adapter contains two LED indicators on the faceplate to monitor link and frame status. The green LED monitors the physical link layer activity. The yellow LED monitors frame status. Definition of the LED status is presented in Table 1-1.
| Color | Status | Indication |
|---|---|---|
| Green | On | Normal condition. Indicates that the adapter is receiving a valid physical-layer signal. |
| Green | Off | Indicates that adapter is not receiving an adequate signal (for example, the device is not connected, the cable or connector is not functioning properly, or the device at the other end is not transmitting a signal.) |
| Yellow | On | Indicates a link framing erro. |
| Yellow | Off | Normal condition. Indicates that the adapter is receiving valid link-level STS-3c or STM-1 frames. |
The following software and features are provided to support the Cisco ATM SBus adapter:
This section describes the hardware and software requirements of host systems in which Cisco ATM SBus adapters can be installed.
The Cisco ATM SBus adapter is designed to be installed in any available SBus M slot in a SPARCstation or SPARCserver. Examples of compatible systems include:
The SPARCstation where the adapters is installed must be running SunOS Version 4.1.3 or Solaris Version 2.3 or higher. There must be 32 MB of RAM (minimum) available.
Each Cisco ATM SBus adapter should arrive in good condition. Before unpacking the adapter and accessories, check for any obvious damage to the packaging and notify your carrier immediately upon receipt.
The following items are included with each adapter:
If any item is missing or damaged, immediately contact Cisco Systems Customer Service.
Table 1-2 provides the product specifications.
| Description | Specifications |
|---|---|
Physical Specifications:
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1.1 in. (2.86 cm) |
Power Requirements (max)
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2.0A @ 5 V, 10 Watts |
Environmental conditions
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32° to 122° F (0° to 50° C) |
Regulatory compliance
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FCC Part 15, Subpart J Class A |
Interface
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SBus Compatibility | Meets IEEE 1496 specification, occupies a single SBus slot |
| Status Indicators | LEDs for link status and physical link error. Refer to Table 1-1 for specific descriptions of LEDs. |
| Operating Systems | SunOS 4.1.3, Solaris 2.3/2.4 |
| Maximum number of VCIs | 1800 |
| IP ATM Support | Complies with RFCs 1483, 1577, and 1755; includes an ATM ARP server that runs in the host system |
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