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Chapter 4
Cisco's Diagnostic Commands
Buffer and Queue Architecture in a Cisco 7000
Now that you understand the buffer's global setup, let's discuss the buffer archi-
tecture and queuing process within a 7000 series router. The architecture is similar
to the cache buffers that were explained with the switching methods.
Hardware Buffers
Each interface (not interface processor) has a hardware buffer, which is used
as a first line of defense for bursty traffic. If the hardware buffer on certain
interfaces fills up, the Layer 2 protocol will signal the sending interface to
slow down. This behavior is dependent on the Layer 2 protocol and whether
or not it supports congestion control.
Three conditions can exist at the interface level: ignore, overrun, and
underrun. An ignore can be caused in three ways. We already discussed the
first--the hardware buffer fills up and it signals to the transmitting interface
to throttle down. The second occurs when the interface is receiving frames
faster than the SP can pull them off. The third occurs when the CxBus is so
busy that the interface processor is unable to copy the packet from the hard-
ware buffer to the SP buffers. Figure 4.7 depicts all three of these scenarios.
F I G U R E 4 . 7
Ignore scenarios for hardware buffers
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