a new session is copied to the interface processor buffer. The packet is then
copied to the CxBus and sent to the switch processor. A check is made against
other switching caches (for example, silicon or autonomous) for an existing
entry. Fast switching is then used because no entries exist within the more
efficient caches. The packet header is copied and sent to the route processor,
where the fast switching cache resides. Assuming that an entry exists in the
cache, the packet is encapsulated for fast switching and sent back to the switch
processor. Finally, the packet is copied to the buffer on the outgoing inter-
face processor. From there, it is sent out the interface.
ing network problems. Because packets don't move across the route
processor after the first packet is process-switched, you can't see them with
packet-level tracing. It's also helpful to turn off fast switching if the interface
card's memory is limited or consumed, or to alleviate congestion when
low-speed interfaces become flooded with information from high-speed
interfaces.
packet arrives on the interface processor, it checks the switching cache clos-
est to it. So far, all of these caches reside on other processor boards. The same
is found with autonomous switching. The silicon-switching cache is checked
first; the autonomous cache is then checked. The packet is encapsulated
for autonomous switching and sent back to the interface processor. Notice
that this time, the packet header was not sent to the route processor.
on the SSE (Silicon Switching Engine). The SSP is a dedicated switch processor
that offloads the switching process from the route processor, which provides a
fast-switching solution. Packets must still traverse the backplane of the router to
get to the SSP and then back to the exit interface, however.