vps_pagesize(5)

NAME

vps_pagesize — minimum (in kilobytes) of system-selected page size

VALUES

Default

16 (KB)

Allowed values

Minimum: 4 (KB)

Maximum: 4194304 (KB)

DESCRIPTION

The Translation Look-aside Buffer (TLB) is a microprocessor feature for virtual memory, where the most recent physical to virtual address translations are cached, in the expectation that these translations are likely to be needed again soon. This is based on the principles of spatial and temporal locality of address references in programs. Historically, the TLB were entirely managed within hardware to achieve speed optimizations while sacrificing the flexibility of software implementations. For example, easily changed algorithms or table implementations.

In recent years, the flexibility of a software implementation of the TLB has regained importance over pure hardware speed. Specifically, the idea of logical grouping of physical frames (whose size if fixed in hardware) into "superpages" or "large pages", that can be represented in software TLB algorithms using a single base address translation for many physical frames, significantly reduces the lost cycles due to page faults (assuming reasonable spatial and temporal locality). For example, consider a scientific application working on an array where each element requires 1 KB of memory. Using the usual 4 KB physical frame size and referencing the array sequentially causes a page fault that requires the page be read into memory from disk or swap, and loads the TLB with the frame base address translation at every fifth element.

If a user application does not use the chatr command to specify a page size for the program text and data segments, the kernel automatically selects a page size based on system configuration and object size. This selected size is then compared to the maximum page size defined by the vps_ceiling tunable, and if the selected size is larger, the value of vps_ceiling is used instead. Then, the value is compared against the minimum page size as set by vsp_pagesize, and the larger of the two values is used.

Who Is Expected to Change This Tunable?

Anyone.

Restrictions on Changing

Changes to this tunable take effect for subsequent physical memory allocations. Physical memory already in use is not affected.

When Should the Value of This Tunable Be Raised?

This tunable can be raised when processes on the system access their text and data in a regular fashion, and over a range of data larger than the current value. For example, if this tunable is set to 16 KB, but almost every process on the system repeatedly works with a four or five distinct 256 KB data sets, then raising the tunable to 256 would reduce the page faulting for these processes because 16 of the previously 16 kilobyte pages are now addressed by a single 256 kilobyte translation.

Average system behavior is not likely to display uniformity of memory access and the optimal value is not easy to determine, so this tunable only represents the lower value for the kernel heuristic and may not change the actual system behavior.

What Are the Side Effects of Raising the Value?

Memory allocations will require larger groups of contiguous pages because the kernel heuristic was not already choosing the larger value.

Requiring larger virtual pages may lead to undesirable system behavior. This is especially true when many processes with small or fragmented data/code sets are active. Every virtual page referenced by the application, regardless of actual usage within that page, requires that the entire page work of contiguous physical frames of memory be present. For example, you cannot swap out half of a large virtual page. Many contiguous frames may not always be possible and may cause memory stalls on allocation that are not strictly needed. In addition, the waste of physical frames in this case would probably lead to increase swap usage, further degrading system performance.

Modern architectures support very large page sizes (up to 4 GB for Itanium® and up to 1 GB for PA-RISC). Setting the value very high (greater than 64 KB) can cause excessive memory consumption and quickly deplete the free memory on the system.

When Should the Value of This Tunable Be Lowered?

The tunable should be lowered if physical memory fragmentation is preventing small memory processes from running due to waiting on contiguous chunks of memory, or if the overall system usage of memory displays poor spatial locality (virtual accesses are not close to each other) producing wasted physical frames.

What Are the Side Effects of Lowering the Value?

If vps_ceiling is lowered as well, applications with large data sets (such as databases) may suffer a performance degradation due to increased page faults. This can be corrected with a chatr of the appropriate application. If vps_ceiling is not modified, the side effects should be minimal as the kernel will now have a larger range to choose an appropriate page size for each application not changed with the chatr command.

What Other Tunables Should Be Changed at the Same Time?

vsp_ceiling should be considered, being the minimum bound on the kernel heuristic range.

WARNINGS

All HP-UX kernel tunable parameters are release specific. This parameter may be removed or have its meaning changed in future releases of HP-UX.

Installation of optional kernel software, from HP or other vendors, may cause changes to tunable parameter values. After installation, some tunable parameters may no longer be at the default or recommended values. For information about the effects of installation on tunable values, consult the documentation for the kernel software being installed. For information about optional kernel software that was factory installed on your system, see HP-UX Release Notes at http://docs.hp.com.

AUTHOR

vps_pagesize was developed by HP.